Technology
SEV-ES
AMD SEV-ES protects virtual machine privacy by encrypting CPU register states during hypervisor transitions.
SEV-ES extends the AMD EPYC (Zen 2 and newer) security suite by encrypting the guest register state during a VMEXIT. While original SEV focuses on memory encryption, SEV-ES secures the VMCB (Virtual Machine Control Block) to prevent the hypervisor from viewing or modifying guest data during context switches. The hardware uses a dedicated AES-128 engine managed by the AMD Secure Processor (ASP) to handle these transitions automatically. This setup effectively blocks a compromised host from scraping sensitive info (like cryptographic keys or memory addresses) directly from the processor registers.
What builders pair with SEV-ES
Projects using both technologies. Select a pairing to see a project.
11 more pairings
Pairing: AMD SEV
Encrypted Inferences: A 5‑Minute FHE with FHE‑Studio and FHE Model Marketplace
Pairing: ARM TrustZone
Encrypted Inferences: A 5‑Minute FHE with FHE‑Studio and FHE Model Marketplace
Pairing: Intel SGX
Encrypted Inferences: A 5‑Minute FHE with FHE‑Studio and FHE Model Marketplace
Pairing: Intel TDX
Encrypted Inferences: A 5‑Minute FHE with FHE‑Studio and FHE Model Marketplace
Pairing: Intel TXT
Encrypted Inferences: A 5‑Minute FHE with FHE‑Studio and FHE Model Marketplace
Pairing: QSEE
Encrypted Inferences: A 5‑Minute FHE with FHE‑Studio and FHE Model Marketplace
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